Silicon Design Verification Engineer Intern

Role Summary

The Silicon Design Verification Engineer Intern will engage in various essential tasks related to IP development and verification, focusing on ensuring functionality and reusability across AMD's diverse product lines during the summer of 2026.

Experience Level

This internship is targeted at candidates pursuing a Master’s or PhD degree in Electrical Engineering or Computer Science, aimed at developing hands-on skills in silicon design and verification.

Responsibilities

The selected intern will be responsible for:

• Participating in IP development based on architectural requirements, ensuring design correctness and reusability.
• Engaging in IP verification according to design specifications.
• Addressing complex design and verification problems.

Requirements

Candidates must fulfill the following qualifications:

• Proficient understanding of Verilog RTL design.
• Familiarity with UVM verification methodology.
• Knowledge of the digital design flow of SoC.
• Strong communication skills in English for both speaking and writing.
• Current enrollment in a relevant MS or PhD program.

Education Requirements

Applicants should be pursuing an MS or PhD degree in Electrical Engineering or Computer Science.