Silicon Design Engineer

Role Summary

The Silicon Design Engineer position focuses on verifying new features in collaboration with various engineering teams. The role involves building and developing test plans, testbenches, and verification tests, as well as debugging the design and ensuring all coverage requirements are met.

Experience Level

This role requires a minimum of 3 years of experience for candidates with a Bachelor's degree, or at least 2 years for those with a Master's degree in Computer Engineering or Electrical Engineering.

Responsibilities

• Collaborate with architects, hardware engineers, and firmware engineers to verify new features.
• Create test plan documentation that accounts for hardware, firmware, and software interactions.
• Develop and build the testbench component using UVM.
• Estimate time for writing new feature tests and necessary changes to the test environment.
• Create directed and random verification tests.
• Debug test failures and work with RTL and firmware engineers to resolve design defects.
• Review functional and code coverage metrics, and modify or add tests as required.

Requirements

Candidates should be proficient in IP or subsystem level verification and debugging firmware and RTL code using simulation tools. Experience with UVM Methodology and testbenches is essential, along with expertise in Verilog, System Verilog, SVA, C, and C++. A solid understanding of DMA, memory systems, and cache is important, and leadership or mentorship experience is a plus. Familiarity with formal verification and scripting languages such as Perl, Ruby, Makefile, and shell is preferred.

Education Requirements

A Bachelor's degree in Computer Engineering or Electrical Engineering with a minimum of 3 years of relevant work experience, or a Master's degree with at least 2 years of experience is required.