Silicon Design Engineer 2

Role Summary

As a Silicon Design Engineer, you will work with formal experts and designers to verify formal properties and drive convergence.

Experience Level

Level - Mid-Career

Responsibilities

• Drive formal verification for the block and write formal properties and assertions to verify the design.
• Coordinate with RTL engineers to implement logic design for better clock gating and verify the various aspects of the design.
• Write tests, sequences, and testbench components in SystemVerilog and UVM along with formal to achieve verification of the design.
• Responsible for verification quality metrics like pass rates, code coverage and functional coverage.

Requirements

• Project level experience with design concepts and RTL implementation for the same.
• Experience or familiarity with formal tools and/or functional verification tools by VCS, Cadence, Mentor Graphics.
• Good understanding of computer organization/architecture.

Education Requirements

Bachelors or Masters degree in computer engineering/Electrical Engineering.