Silicon Design Engineer

Role Overview

We are looking for a detail-oriented Verification Engineer to join our DDR PHY IP development team. This entry-level position involves verifying high-performance DDR PHY intellectual property utilized in leading-edge System on Chips (SoCs) across various markets, including data centers, mobile, and automotive.

Position Summary

The ideal candidate should exhibit a passion for digital design and possess a strong willingness to learn. Responsibilities include developing verification environments, ensuring design accuracy, and collaborating with design teams to achieve successful silicon outcomes.

Experience Level

This role is tailored for candidates at the entry level, specifically those ready to initiate their careers in silicon design verification.

Key Responsibilities

• Develop and maintain UVM-based verification environments for DDR PHY IP.
• Write and execute test plans, including directed and constrained-random tests.
• Debug simulation failures and collaborate with RTL designers to resolve issues.
• Create and maintain verification collateral, such as testbenches, checkers, and scoreboards.
• Conduct regression runs and track functional coverage.
• Contribute to automation scripts for enhancing regression and verification processes.

Required Qualifications

Applicants should have a Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related discipline. A solid understanding of digital design fundamentals and familiarity with SystemVerilog and UVM is essential.

Education Requirements

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field preferred.