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Senior Staff R&D Engineer - High-Performance Core and IPs

Synopsys
Full-time
On-site
Bengaluru, India
Level - Mid-Career

Role Overview

The Senior Staff R&D Engineer for High-Performance Cores and IPs plays a critical role in the development of semiconductor technology at Synopsys. This position requires extensive expertise in physical design and advanced methodologies to push the boundaries of high-performance silicon design.

Position Summary

The role involves collaborating with global teams to innovate and implement complex interface IPs, CPUs, and GPUs using advanced design tools. The engineer is tasked with improving design methodologies for power, performance, and area (PPA) metrics while ensuring the implementation of best practices in low-power and high-performance design.

Experience Level

Mid-Career: A minimum of 9 years of relevant experience in the semiconductor field is required, with a strong emphasis on physical design and high-performance methodologies.

Key Responsibilities

  • Develop and refine PPA methodologies for complex interface IPs at advanced technology nodes.
  • Implement cutting-edge designs using Synopsys tools like RTLA, Fusion Compiler, DSO, and Fusion AI.
  • Drive optimization processes to enhance design quality and predictability.
  • Work with global experts to solve design challenges and improve quality of results (QOR).
  • Automate workflows using scripting languages to enhance design efficiency.
  • Analyze issues related to synthesis and timing closure, focusing on power optimization and constraints management.
  • Participate in technical reviews, offering guidance on design best practices.

Qualifications Needed

Applicants should have a strong background in physical design with:

  • A minimum of 5 years of experience in high-performance and low-power methodologies.
  • Expertise in synthesis, timing closure, and optimization flows.
  • Hands-on experience with advanced technology nodes below 5nm.
  • Proficiency in scripting (TCL, Perl, Python) for process automation.
  • An understanding of RTL, DFT, and experience with interface IP controllers is preferred.

Education Requirements

BS or MS in Electrical Engineering or a related field is required for this position.