The Senior Signal and Power Integrity Engineer position involves performing advanced modeling, simulation, and analysis of signal and power integrity (SIPI). The engineer will address challenges related to silicon, package, PCB, connectors, and components across multi-signal transmission line interfaces.
This role requires a systematic approach to troubleshooting and reviewing the performance of interfaces. The engineer will document SIPI analysis results, conduct experiments to validate methodologies, and develop specifications for signal and power integrity processes for customers.
This is a mid-career position requiring a minimum of 6 years of hands-on experience in electrical engineering fields, particularly in interface IP product development and verification methodologies, ideally in high-speed DDR interfaces.
Master's or Bachelor's degree in Electrical or Electronics Engineering is required.