Senior Manager, IP Design

Job Title

Senior Manager, IP Design

Role Summary

Lead and manage an IP circuit design group in India focused on analog and digital IP for DRAM-related memory products. The role oversees design, verification, and silicon performance validation for a variety of circuits (I/Os, regulators, amplifiers, oscillators, pumps, translators, fuse arrays, DLLs, and control logic) and coordinates with product engineering, process integration, and transistor modeling teams.

The position requires hands-on CMOS analog and digital expertise, strong leadership to scale and direct large design teams, and coordination across CAD, modeling, standards, and verification functions.

Experience Level

Senior level — requires 12+ years of relevant industry experience.

Responsibilities

The primary responsibilities include technical leadership, delivery oversight, and cross-functional coordination for IP development.

• Lead and manage a large analog/digital circuit design team in India; set technical direction and priorities.
• Guide CMOS analog and digital circuit design and simulation across IP blocks.
• Work with Product Engineering to verify silicon performance against simulations and iterate on designs.
• Collaborate with Process Integration and transistor modeling teams to optimize circuits for leading-edge process nodes.
• Ensure design quality through circuit verification, layout verification, and parasitic extraction.
• Proactively solicit inputs from Standards, CAD, modeling, and verification groups to ensure robust designs.
• Mentor and develop engineering staff; drive adoption of AI-related tools to improve team productivity.

Requirements

Key technical and leadership requirements. (Degree requirement is listed under Education Requirements.)

• Proven experience leading large circuit design teams and delivering complex IP.
• Extensive analog and digital design and simulation experience.
• Experience with circuit verification and optimization, including layout verification and parasitic extraction.
• Proficiency with UNIX and Cadence design environment (simulation, schematic entry, SPF extraction).
• Familiarity with Finesim and/or HSpice; knowledge of power network analysis.
• Strong written and verbal communication skills; able to convey complex technical concepts.
• Ability to mentor teams and promote practical use of AI tools in engineering workflows.
• Preferred: DRAM circuit design experience and DRAM array knowledge; understanding of device physics and CMOS processing techniques.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering (specified). The posting indicates this degree requirement alongside the stated experience level of 12+ years.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.