The Senior Manager of Analog Design will lead a team responsible for developing high-speed SerDes IP technology. This position focuses on design innovation and operational excellence in a collaborative environment, working with both analog and digital teams to meet project goals.
As a leading figure in the Analog Design team at Synopsys, you will utilize your extensive experience in high-speed design to coordinate team activities and ensure successful project execution. You’ll oversee design reviews, personnel development, and maintain design quality standards.
The ideal candidate has over 8 years of experience in Analog Design with specific expertise in high-speed SerDes applications, coupled with at least 3-5 years in a supervisory role.
A Bachelor’s or Master’s degree in Electronics Engineering is required, alongside significant analog design experience and a thorough understanding of CMOS fundamentals. Strong communication and documentation skills are essential to effectively present technical information.
B.Tech/BE/M.Tech/MS in Electronics Engineering.