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Senior FPGA ASIC Design Engineer

Advanced Micro Devices
Full-time
Remote friendly (Penicuik, United Kingdom)
Worldwide
Level - Mid-Career

Company Overview

Advanced Micro Devices Inc, known for its innovative computing solutions, strives to advance technology in areas such as AI, gaming, and data centers. The company consistently pushes for excellence in product development.

Role Summary

The Senior FPGA ASIC Design Engineer will be an essential part of the engineering team, focusing on the development and validation of designs for FPGA and ASIC platforms. This role involves significant collaboration, technical mentorship, and contributions to complex projects that serve various industries.

Experience Level

This position is suitable for experienced engineers with a solid background in FPGA and ASIC design and a passion for leadership and mentorship in technology development.

Responsibilities

  • Lead discussions on technical specifications and collaborate with cross-functional teams to implement new features.
  • Mentor junior engineers, guiding them in best practices and design reviews.
  • Document hardware and software component interactions comprehensively.
  • Estimate timelines for new features and assist with project planning.
  • Design and implement RTL for new modules and systems while ensuring high standards of quality and performance.
  • Develop software and scripts for module testing and control.
  • Investigate test failures, identify root causes, and work with the team to resolve issues efficiently.
  • Drive improvements in design and validation methodologies.
  • Gradually assume leadership roles with a potential pathway to team management.

Requirements

Candidates should possess a deep understanding of digital processing architectures and tools for FPGA/ASIC design, along with significant software development experience. Proven technical leadership experience and the ability to mentor junior staff are essential.

Education Requirements

BSc or Masters in Electrical or Computer Engineering or a related field is required.