Senior Engineer FPGA Engineer

Role Summary

As a Senior Engineer FPGA Engineer at Arm, you will focus on building an understanding of incoming Arm IP RTL & SoC designs. Your main tasks will involve making relevant design changes to implement a prototype of the ASIC RTL on FPGA. Responsibilities include RTL integration, modifications, simulation/verification, and validation of FPGA specific IPs and peripherals within the SoC prototype.

Experience Level

Mid-Career (4 to 7 years of experience required).

Responsibilities

• Development and verification of subsystems, peripherals, and IPs for FPGA prototyping.
• Modification of ASIC RTL for the FPGA prototyping platform.
• Debugging test failures and collaborating with design teams and FPGA users.

Requirements

• Strong RTL skills in Verilog / System Verilog with source code version control.
• 4 to 7 years of experience in relevant fields.
• Understanding of Arm systems, SoC architecture, and AMBA protocols.
• Experience with high speed I/O peripherals (LPDDR, PCIe, Ethernet, USB, HBM).
• Familiarity with Tcl, Python, or other scripting languages.

Education Requirements

A degree in Engineering or related field is typically required.