Senior Applications Engineer – Verification

Role Summary

The Senior Applications Engineer position involves collaborating with customers to solve complex verification challenges in the semiconductor industry. You will engage in direct customer support, delivering tailored technical solutions and ensuring successful project outcomes through the use of Synopsys Verification Platform.

Experience Level

This role requires a Master's degree in Electronics or a Bachelor's degree with 1-2 years of relevant experience in digital design and verification methodologies.

Responsibilities

Key responsibilities include:

• Collaborating with customers to understand verification challenges and providing tailored solutions.
• Supporting customer projects throughout tapeout schedules, resolving technical issues promptly.
• Delivering technical presentations and training sessions on Synopsys EDA tools.
• Assisting in dynamic simulation and coverage analysis.
• Creating technical documentation and knowledge resources.
• Communicating customer feedback to R&D teams for product enhancement.
• Staying updated on industry trends and verification technologies.

Requirements

Candidates must have:

• A solid understanding of digital design, HDLs (Verilog, VHDL), and System Verilog.
• Experience in dynamic simulation, verification methodologies, and debugging.
• Familiarity with Synopsys EDA tools like VCS and Verdi is a plus.
• Proficiency in UNIX and scripting languages such as Tcl.
• Excellent communication skills with direct client interaction experience.

Education Requirements

A Master's degree in Electronics or a Bachelor's degree in the same field, combined with 1-2 years of relevant experience.