Company: Advanced Micro Devices Inc
Location: Markham, Ontario, Canada
Date Posted: 2026-01-22
Role Summary
ASIC Design Engineer who will be involved in all aspects of IP RTL design.
Experience Level
Level - Mid-Career
Responsibilities
- IP RTL design for AMDs PCI Express (PCIe) IP used for all next generation server, clients, GPU and Semi-custom products.
- Work closely with IP and system architects to micro-architect cutting edge features.
- Apply low power design techniques to existing logic and maintain overall system performance.
- Focus on timing, LINT and CDC closure to ensure high quality RTL.
- Support verification and debug of the ASIC throughout various stages of the project.
Requirements
- Strong working experience in RTL coding using Verilog HDL.
- Experience in design with multiple clock domains.
- Experience in using lint and CDC tools.
- Experience in developing specifications.
- Understanding of high-speed I/O protocols (PCIe, USB, SATA, Ethernet…).
Education Requirements
Bachelors or Masters degree in Computer Engineering or Electrical Engineering.