Role Summary
The RTL Design Expert will play a critical role in the design of IP RTL for AMD’s PCI Express (PCIe) technology, aimed at enhancing next-generation computing products such as servers, clients, GPUs, and semi-custom solutions.
Experience Level
This position is suited for professionals with significant experience in ASIC design, particularly in RTL coding and related methodologies.
Responsibilities
- Develop and implement IP RTL designs for PCIe technology.
- Collaborate with IP and system architects to create advanced micro-architecture features.
- Incorporate low power design techniques to optimize existing logic.
- Ensure high quality RTL by focusing on timing, LINT, and CDC closure.
- Assist in the verification and debugging stages of the ASIC design processes.
Requirements
- Strong background in RTL coding with Verilog HDL.
- Experience working with multiple clock domains.
- Familiarity with lint and CDC analysis tools.
- Ability to develop specifications for design requirements.
- Knowledge of high-speed I/O protocols, including PCIe, USB, SATA, and Ethernet.
Education Requirements
Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.