RTL Design Engineer

Role Overview

The RTL Design Engineer position involves developing the next generation coherent interconnect for CPU, GPU, and accelerators as part of the Infinity Fabric Architecture and RTL team. The role provides the opportunity to work on a diverse range of AMD products catering to various markets, including servers, HPC, and gaming. This position requires a fast-paced work ethic focused on advancing technology and innovative design.

Experience Level

This is a mid-career level position suitable for engineers with significant experience in RTL design.

Key Duties

The engineer will be responsible for:

• Conducting architectural/performance exploration and design optimization to meet specific power, performance, area, and timing requirements.
• Writing clear and synthesizable Verilog RTL code.
• Performing unit-level testing to ensure high-quality code delivery to the Design Verification Team.
• Creating assertions for design coverage analysis.
• Developing comprehensive block-level design documentation.
• Engaging in post-silicon functional debugging and performance tuning.

Required Qualifications

Ideal candidates will have expertise in:

• Designing logic blocks for CPUs, GPUs, or related technologies.
• Proficient use of Verilog and System Verilog.
• Familiarity with C, C++, or scripting languages such as Perl or Python.
• A strong foundation in digital electronics and high-speed designs (>1GHz).
• Understanding of multi-processor coherency, memory ordering, and I/O protocols.
• Strong debugging and analytical skills.

Education Requirements

A BS, MS, or PhD in Electrical or Computer Engineering is preferred.