The Principal HBM Design Verification Engineer will focus on the design verification process for High Bandwidth Memory (HBM) technology. This role entails collaborating with various engineering teams to develop verification strategies that ensure the functionality and performance of HBM designs meet stringent specifications.
This position is suitable for candidates with mid-career experience in ASIC digital design, particularly with a specialization in memory architectures.
Applicants should have a strong background in digital design and verification, with a focus on memory technologies. Proficiency in simulation tools and system-level verification environments is essential, along with experience in scripting languages such as Python or Tcl.
A Bachelor’s or Master’s degree in Electrical Engineering or a related field is required for this role.