Job Summary
Join the design team at Cadence focused on developing firmware for cutting-edge DDR5 PHY technology. In this role, you will engage in firmware development, collaborating with hardware designers and memory subsystem architects to implement solutions and debug firmware in RTL-based hardware simulations.
Experience Level
This position is ideal for candidates at a mid-career level with relevant experience in embedded firmware development.
Core Responsibilities
The principal responsibilities include:
- Developing firmware for DDR5 PHY using microcontrollers.
- Programming in C, involving bare-metal programming and low-level API development.
- Collaborating on training algorithms with hardware designers and memory subsystem architects.
- Creating firmware-hardware co-verification plans in partnership with the verification team.
- Conducting firmware development and debugging on RTL based hardware simulations.
- Debugging on silicon bring-up boards.
Job Requirements
Candidates should possess the following qualifications:
- Strong knowledge of DDR5 JEDEC specifications and DIMM configurations.
- Experience in developing bare-metal firmware for High-speed SerDes or Memory interface Physical Layer blocks.
- Proficiency in C programming for embedded systems.
- Experience with debugging RTL simulations.
- Familiarity with Shell, Perl, Python, and TCL scripting.
- Experience with verification EDA tools, including simulators and waveform viewers.
Education Requirements
A bachelor’s or higher degree in a relevant field such as Computer Engineering or Electrical Engineering is typically required.