As a Design Verification Engineer, you will assist in developing the design, verification, and infrastructure components of various digital design blocks within the Graphics Core IP (GFXIP) at AMD. You will collaborate with senior engineers to create test plans for pre-silicon Digital Design Verification, develop testbenches, and monitor regression runs while debugging any encountered issues.
Level - Mid-Career
Preferred experience includes a solid understanding of Computer Architecture and Digital Design concepts, proficiency in IP level ASIC verification, experience with UVM testbenches and Linux environments, and familiarity with Verilog, System Verilog, C, and C++. Knowledge of scripting languages such as Perl or Ruby, as well as graphics pipeline knowledge, is advantageous.