Post Silicon Validation Engineer

Role Overview

In this position, you will be responsible for verifying complex Ryzen CPU clusters and blocks using formal methods. You will create formal proofs and verification strategies while collaborating closely with architects, RTL designers, and validation teams.

Experience Level

This role is ideal for candidates with 5-10 years of experience in formal verification, specifically for logic or microarchitecture IP, preferably related to CPUs.

Key Responsibilities

• Formal Verification & Proof Development: Conduct formal verification through model checking and equivalence checking on CPU microarchitecture and IP blocks. Develop formal proofs and abstraction models to enhance coverage and identify bugs.
• Test Planning & Strategy: Generate formal verification plans that define scope, coverage goals, strategies, and proof approaches while leading ROI analyses of formal versus dynamic methodologies.
• Collaboration & Debugging: Collaborate with architects and verification teams to address failing assertions, improve design quality, and support post-silicon failure debug efforts when necessary.
• Methodology & Infrastructure Development: Maintain and enhance formal verification infrastructure by investigating new techniques and establishing reusable methodologies for the team.

Qualifications

Candidates must possess a Bachelor’s, Master’s, or Ph.D. in Computer Engineering, Electrical/Electronic Engineering, Computer Science, or a related field.

Education Requirements

• Bachelor’s, Master’s, or Ph.D. in Computer Engineering, Electrical/Electronic Engineering, or Computer Science.

Requirements

• 5-10 years of experience in formal verification for logic/microarchitecture IP, preferably CPU-related.
• Experience with formal engines such as JasperGold or VC Formal for bug identification.
• Proficiency in SystemVerilog Assertions and HDL modeling (Verilog/VHDL/SV).
• Strong programming abilities in scripting languages such as Python, Tcl, or Perl.
• Analytical skills to uncover verification gaps and strong collaboration capabilities across teams.
• Desirable qualifications include a deep understanding of CPU microarchitecture and experience with CPU post-silicon validation.