Role Summary
The Physical Design Intern will work on implementing tool flows, developing CAD methodologies, and automating processes through scripting. The role focuses on backend design tasks including layout implementation and timing closure.
Experience Level
Internship, pursuing a degree in Electronic Engineering or a related technical field.
Responsibilities
The intern will be responsible for:
- Block-level layout implementation and timing closure.
- Static Timing and Crosstalk analysis and timing closure.
- Design For Testing analysis and timing closure.
- Synthesis and Physical synthesis.
- Learning design rules of advanced technology nodes.
- Optimizing design implementation in terms of timing, area, and power.
- Writing thorough documentation.
- Presenting and defending decisions and results to the team.
Requirements
Qualifications include:
- Pursuing a degree in Electronic Engineering or related fields.
- Less than 4 final exams remaining or less than six months left to finish the degree.
- Detail-oriented and thorough in work.
- Experience in circuit design using CAD tools (Synopsys, Cadence, Mentor) is valuable.
- Fluency in English, both speaking and writing.
- Good Spanish communication skills (verbal and written).
Education Requirements
Currently pursuing a degree in Electronic Engineering or a related technical fields.
About the Company
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

Date Posted: 2026-04-23