Physical Design Engineer Intern
Marvell TechnologyRole Summary
The Physical Design Engineer Intern will be part of Marvell's central physical design team, engaging in implementation and verification of complex SOC designs.
Experience Level
Internship; candidates should be enrolled in a Bachelor of Electrical Engineering or Computer Engineering program, with less than one year remaining until graduation.
Responsibilities
The intern's assignments will include:
- Block-level layout implementation and timing closure.
- Static Timing/Crosstalk Analysis and timing closure.
- Synthesis/Physical Synthesis.
- Power/IR/EM analysis.
- Physical verification (LVS/DRC/ERC).
- ECO implementation.
Requirements
Must-have requirements include:
- Experience with scripting/programming using Tcl/Tk/Perl.
- Detail-oriented, self-motivated team worker with good verbal and written communication skills.
- Previous experience in physical design and automatic place and route is a plus.
- Familiarity with Synopsys/Magma/Cadence place and route tools and synthesis/STA is a plus.
Education Requirements
Enrolled in a Bachelor of Electrical Engineering or Computer Engineering program.
About the Company
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.
