Role Summary
NVIDIA is seeking a passionate and highly motivated Physical Design Engineer to lead block and chip level physical design (PD) activities on cutting-edge GPU and ASIC projects. This role involves collaboration with design teams to tackle challenges in physical implementation while ensuring the highest standards of performance, power, and area (PPA).
Experience Level
This role requires candidates with over 1 year of relevant experience in physical design, preferably in the semiconductor industry, with strong expertise in the RTL2GDSII flow.
Responsibilities
- Lead and execute various physical design activities including floor planning, RC extraction, place and route (PNR), static timing analysis (STA), and layout verification.
- Collaborate with design teams to address and resolve design challenges.
- Identify improvements in the RTL to GDS flow to enhance PPA.
- Debug tool and design-related issues effectively.
- Oversee all aspects of physical design for GPUs and ASICs targeting various markets.
Requirements
- BE/BTECH/MTECH or equivalent technical experience.
- Strong understanding of the RTL2GDSII flow and familiar with processes and methodologies in leading technologies.
- Experience in block-level and full-chip floor planning and verification.
- Proficiency in tools such as ICC2/Innovus, and Primetime/Tempus for RTL2GDSII implementation.
- Expertise in automation skills with Perl, Tcl, or tool-specific scripting.
- Excellent analytical and problem-solving capabilities with good communication skills.
Education Requirements
BE/BTech or MTech degree in relevant fields or equivalent experience required.