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Physical Design Engineer

Akeana
April 20, 2026
On-site
Level - Mid-Career

Role Summary

The Physical Design Engineer will join a start-up team focused on SOC and processor design. The role involves significant responsibility in a close-knit team environment.

Experience Level

Mid-level, with several years of experience in physical design.

Responsibilities

The main responsibilities include:

  • Managing PD flows, synthesis, Place and Route (P&R), and timing closure.
  • Implementing power saving techniques.
  • Overseeing full chip physical verification on hierarchical chips.

Requirements

Candidates must possess the following skills:

  • Strong background in physical design.
  • Experience with PD flows and timing closure.
  • Proficient in power saving techniques.

Education Requirements

Not specified.


About the Company

Company: Akeana

Headquarters: Santa Clara, CA, USA

Akeana is a start-up specializing in processor design, with a team experienced in developing state-of-the-art products. Their expertise spans multiple architectures, including Risc-V, ARM, and x86, with backgrounds from prominent companies in the semiconductor industry. Funded by top-tier venture capitalists and industry leaders, Akeana focuses on innovative RTL design and micro-architecture development.

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Date Posted: 2026-04-20