PCIe SubSystem Design Verification Engineer

Company Overview:
Advanced Micro Devices (AMD) specializes in creating innovative products that enhance computing experiences across various sectors including AI, gaming, and data centers.

Role Overview

The PCIe SubSystem Design Verification Engineer is responsible for ensuring the verification of advanced PCIe Controller Designs. This role involves working on next-generation technologies that contribute to AMD's SOCs, which power AI Training, Gaming Consoles, and Personal Computers.

Experience Level

This position is ideal for professionals with a solid background in design verification, particularly those with experience in high-speed digital design verification.

Key Responsibilities

• Execute functional verification from test plan to sign-off.
• Collaborate with architects to comprehend IP features.
• Write, implement, and review test plans.
• Verify high-speed digital designs using coverage-driven and formal verification techniques.
• Manage verification flow from initial planning to coverage sign-off.
• Design and implement testbench components using UVM methodology.
• Participate in code reviews and provide technical leadership for verification sign-off.

Key Requirements

• Expertise in SystemVerilog and UVM.
• Proficient in object-oriented programming and scripting (Ruby, Python, Perl).
• Experience with protocols such as PCIe, SATA, USB, and Ethernet.
• Knowledge of standard bus/interface protocols (AXI, AHB, AMBA, OCP, PIPE).
• Strong technical skills and effective team collaboration.
• Excellent communication and time management abilities.
• Must be a self-starter with an ability to deliver tasks on time.

Education Requirements

Bachelor's or Master's degree in Computer Engineering or Electrical Engineering is required.