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Package Layout Design Intern

Marvell Technology
March 12, 2026
Part-time
On-site
Bucharest, Bucharest, Romania
Level - Entry or Early Career

Job Title

Package Layout Design Intern

Role Summary

The Package Layout Design Intern will be part of a team responsible for integrated circuit package designs. The role involves applying layout practices to meet electrical and thermal requirements for high-performance applications.

Experience Level

Entry-level; 0-1 years of previous experience.

Responsibilities

Key responsibilities include:

  • Designing flip-chip package designs using best layout practices.
  • Performing integrity analysis of packaging with appropriate tools.
  • Collaborating with the PKG SI/PI team to enhance layout solutions for better electrical performance.
  • Carrying out other related responsibilities as required.

Requirements

Candidates should meet the following requirements:

  • Currently pursuing a Bachelor’s degree in Electronics, Computer Science, or related fields.
  • Basic electronics knowledge including circuits and circuit simulation.
  • Basic layout knowledge, including routing and PCB design rules.
  • Familiarity with signal theory and electric simulations.
  • Experience with PCB routing projects is a plus.
  • Strong communication and team collaboration skills.
  • Proficient in spoken and written English.

Education Requirements

Must be pursuing the 3rd year of a Bachelor's degree in a technical field.


About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

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Date Posted: 2026-03-12