MTS Silicon Design Engineer

Role Summary

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s graphics processor IP, resulting in no bugs in the final design.

Experience Level

Level - Mid-Career

Responsibilities

Key responsibilities include:

• Collaborating with architects, hardware engineers, and firmware engineers to understand the new features to be verified.
• Building test plan documentation, accounting for interactions with other features, hardware, firmware, and software driver use cases.
• Estimating the time required to write the new feature tests and any necessary changes to the test environment.
• Building directed and random verification tests.
• Debugging test failures to determine the root cause; collaborating with RTL and firmware engineers to resolve design defects and correct any test issues.
• Reviewing functional and code coverage metrics and modifying or adding tests to meet the coverage requirements.

Requirements

Required qualifications include:

• Proficient in IP level ASIC verification.
• Proficient in debugging firmware and RTL code using simulation tools.
• Strong knowledge of Verilog, System Verilog, C, and C++.
• Experience with UVM testbenches and working in Linux and Windows environments.
• Background in graphics pipeline and developing UVM based verification frameworks and testbenches.
• Good understanding of SystemC, TLM, and scripting languages such as Perl, Ruby, Makefile, and shell.
• Exposure to leadership or mentorship is an asset.

Education Requirements

Bachelors or Masters degree in computer engineering or Electrical Engineering.