Role Summary
As a Modeling Design Engineer, you will be responsible for creating and validating models used for Lattice FPGAs, ensuring their accuracy and performance. You will collaborate closely with design and development teams to guarantee the reliability of our models.
Experience Level
6+ years of experience in circuit modeling and simulation.
Responsibilities
- Develop and validate models for analog, digital, and mixed-signal circuits.
- Utilize simulation tools such as Verilog, VHDL, SystemVerilog, or similar for digital circuit analysis.
- Provide technical leadership and mentorship to a team of circuit modeling engineers.
- Collaborate with design engineers to understand circuit requirements and specifications.
- Work with internal customers to ensure their needs for model performance are met.
- Analyze simulation results and provide feedback to enhance models and performance.
- Optimize circuit models for performance, accuracy, and efficiency.
- Document modeling processes, assumptions, and results for stakeholders.
- Stay updated with advancements in circuit modeling techniques and tools.
Requirements
- Bachelor’s or Master’s degree in Electrical Engineering.
- 6+ years of experience in circuit modeling and simulation.
- Proficiency in circuit simulation tools such as SPICE, Verilog, VHDL, System Verilog, or similar.
- Understanding of analog, digital, and mixed-signal circuit design principles.
- Skill in modeling with SystemVerilog and higher-level modeling with SystemC.
- Excellent analytical and problem-solving abilities.
- Strong communication and collaboration skills.
- Experience with data analysis and visualization tools is a plus.