Lead DFT Engineer

Role Summary

The Lead DFT Engineer will be part of the Radeon Technologies Group, contributing to the design and integration of innovative silicon solutions. This role involves close collaboration with architecture, IP design, and physical design teams to achieve optimal results in silicon performance.

Experience Level

This position is intended for candidates with prior experience in silicon design and DFT methodologies such as IEEE1500 and JTAG. A background working with senior engineers in the field is essential.

Responsibilities

• Implement and verify DFT architecture and features.
• Conduct scan insertion and ATPG pattern generation.
• Verify ATPG patterns using gate-level simulation.
• Analyze test coverage and work towards reducing test costs.
• Support post-silicon processes to ensure product success and enhance yield learning.

Requirements

Successful candidates should demonstrate accuracy and attention to detail, along with strong communication and problem-solving skills. Familiarity with tools such as Mentor TestKompress and Synopsys TestMAX is advantageous.

Education Requirements

A minimum of a Bachelor’s or Master’s degree in Computer Engineering or Electrical Engineering is required.