Layout Design Engineer

Role Summary

Join Intel's engineering team in Mexico as a Layout Design Engineer, where you will be responsible for transforming circuit concepts into physical designs. Focus on optimizing layouts for advanced semiconductor technologies.

Experience Level

Experienced hire with at least 3 years of relevant experience.

Responsibilities

Your responsibilities will include:

• Designing custom physical layouts for analog, mixed-signal, and memory circuits using CMOS technology.
• Collaborating with circuit designers to meet functional and performance specifications.
• Executing DRC-LVS verification to ensure compliance with design rules.
• Maintaining quality standards for layout integrity.
• Optimizing circuit performance and area efficiency through layout floorplans.

Requirements

Minimum qualifications include:

• Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field.
• 3+ years of experience in CMOS analog/memory custom layout design and EDA tools.
• Expertise in Unix/Linux environments and fluency in English.
• Unrestricted right to work in Mexico.

Preferred qualifications include:

• Post Graduate degree in relevant fields.
• Experience with advanced process nodes and scripting automation.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or related fields required.