Junior ASIC Verification Engineer

Role Summary

The position involves working as a Junior ASIC Verification Engineer at Advanced Micro Devices (AMD) in Santa Clara, California. The candidate will be part of the NTSG team focused on enhancing AMD’s data center networking technologies through ASIC verification.

Experience Level

This role is suited for early career professionals, particularly those who may have recently graduated with relevant educational backgrounds and are looking to build their skills in ASIC verification.

Responsibilities

The responsibilities include, but are not limited to:

• Familiarity with UVM, System Verilog, and C or C++.
• Basic knowledge of System Verilog simulators and waveform debugging tools.
• Developing and executing test plans for Unit/IP/Subsystem/SOC level verification.
• Creating System Verilog test benches, including stimulus generation, checkers, and assertions.
• Identifying bugs in architecture and functionality.
• Utilizing design and verification tools such as VCS or similar simulation tools.
• Understanding Computer Architecture concepts.

Requirements

Candidates should have strong analytical and problem-solving skills, good debugging capabilities, and the ability to work effectively in a collaborative team environment.

Education Requirements

A Bachelor of Science in Electrical Engineering (BSEE) or an equivalent degree is required; a Master of Science in Electrical Engineering (MSEE) is preferred.