IP Verification Lead

Role Summary

The IP Verification Lead position emphasizes the planning, building, and execution of verification processes for AMD's graphics processor IP. The role aims for a bug-free final design by thoroughly verifying new and existing features.

Experience Level

This position requires a candidate with 7+ years of experience, indicating a mid-career level of expertise in silicon design and verification.

Responsibilities

The responsibilities include:

• Collaborating with architects, hardware engineers, and firmware engineers to verify new features.
• Creating comprehensive test plan documentation considering all interactions with hardware, firmware, and software.
• Estimating the efforts required to write new feature tests and modifying the test environment as necessary.
• Developing directed and random verification tests.
• Debugging test failures and collaborating with RTL and firmware engineers to resolve issues.
• Reviewing functional and code coverage metrics to ensure comprehensive test coverage.

Requirements

Key qualifications for this position include:

• Proficient in ASIC verification at the IP level and debugging firmware and RTL code using simulation tools.
• Experienced in using UVM testbenches, and working in both Linux and Windows environments.
• Familiar with Verilog, System Verilog, C, and C++.
• Strong understanding of protocols such as AXI and ACE, along with knowledge in Ethernet, PCIe, and USB.
• Experience in developing UVM-based verification frameworks and automating workflows in distributed environments.
• Good understanding of UVM concepts, SystemVerilog, SystemC, and TLM.
• Knowledge of scripting languages like Perl, Ruby, or shell scripting is preferred.
• Leadership or mentorship experience is a plus; exposure to video codec systems or multimedia solutions is desirable.

Education Requirements

A Bachelor’s or Master’s degree in Computer Engineering or Electrical Engineering is required.