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IP Power Engineer

Advanced Micro Devices
Full-time
On-site
Shanghai, China
Level - Mid-Career

Role Summary

We are looking for an IP Power Engineer to join the MMHUB/ATHUB IP design team at Advanced Micro Devices. This position focuses on developing power management solutions for state-of-the-art IP blocks utilized in high-performance products, emphasizing power optimization and compliance with power, performance, and area (PPA) specifications.

Experience Level

The ideal candidate should possess a strong foundation in digital design and processor architecture, showcasing an ability to collaborate effectively across diverse teams and timezones while demonstrating analytical and problem-solving capabilities.

Responsibilities

The main responsibilities include:

  • Developing power intent specifications using UPF/CPF formats.
  • Creating and optimizing power domains, and power gating strategies.
  • Collaborating with RTL design teams for low-power designs.
  • Conducting static and dynamic power analysis with relevant tools such as PrimeTime PX and Voltus.
  • Identifying power optimization opportunities through profiling.
  • Providing recommendations for power reduction based on consumption trends.
  • Maintaining power models for early power estimation.
  • Debugging power-related issues in RTL and gate-level environments.
  • Ensuring proper coverage of power scenarios in functional verification with DV teams.

Requirements

Candidates should possess the following qualifications:

  • In-depth understanding of digital design and advanced process nodes (7nm, 5nm, 3nm).
  • Proficiency in hardware description languages (Verilog, SystemVerilog, VHDL).
  • Experience with UPF and power-aware design methodologies.
  • Familiarity with power analysis tools such as Synopsys PrimeTime PX or Cadence Voltus.
  • Knowledge in power management techniques including clock gating and DVFS.
  • Understanding of static and dynamic power consumption.
  • Experience in scripting (Python, Perl, TCL, Shell) for automation purposes.
  • Exposure to machine learning or AI in power optimization.
  • Background in physical design and power delivery systems.
  • Experience in post-silicon power characterization.

Education Requirements

A Master's degree in Computer Engineering or Electrical Engineering is required.