IP Design Verification Engineer

Role Summary

We are seeking a detail-oriented IP Design Verification Engineer to enhance our design verification processes. The individual will play a critical role in driving AMD's capabilities in delivering high-quality technologies through defining methodologies and improving verification infrastructure.

Experience Level

This position is suitable for applicants with a solid level of experience in design verification, preferably with a background in digital design.

Responsibilities

• Collaborate with architects and engineers to understand features to be verified.
• Own different verification tasks and ensure delivery of test plans, benches, and tests using System Verilog and UVM.
• Debug RTL simulations and work with development teams to verify fixes.
• Review coverage metrics to ensure requirements are met.
• Enhance verification flows and offer technical support across teams.

Requirements

• Strong knowledge in IP level ASIC verification and debugging skills.
• Familiarity with design and verification tools and simulation environments.
• Understanding of Formal Verification methodologies and apps.
• Proficient in UVM and System Verilog, alongside programming skills in C and C++.
• Experience with automating workflows in compute environments.

Education Requirements

Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.