IP Design Technical Lead/Staff ASIC RTL Design Engineer

Role Description

The IP Design Technical Lead is responsible for leading the ASIC RTL design efforts in the team. The role involves working on high-performance designs and collaborating across multiple disciplines to define architecture and specifications for the projects. You will focus on developing innovative design solutions and troubleshooting complex issues to ensure product success.

Experience Level

This position is suitable for candidates with at least 5 to 10 years of experience in ASIC design, engineering or related fields. A strong foundation in RTL design and familiarity with the ASIC lifecycle is expected.

Key Responsibilities

• Lead ASIC RTL design efforts and coordinate with cross-functional teams to meet project milestones.
• Develop and optimize RTL code for complex digital designs using industry-standard methodologies.
• Conduct design reviews, analyze design trade-offs, and implement solutions for performance and area optimization.
• Mentor junior engineers and guide them through technical challenges in design implementation.
• Collaborate with verification teams to create validation plans and ensure design correctness.

Essential Qualifications

Candidates should possess a strong understanding of digital design principles and experience with RTL coding in languages such as Verilog and VHDL. Familiarity with tools for simulation, synthesis, and STA is also required.

Education Requirements

A Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or a related field is required. Professional experience and knowledge in ASIC design are critical assets for this role.