IP Design Engineer

Role Summary

We are seeking a self-motivated senior design engineer to join our team to enhance our capabilities in delivering high-quality, industry-leading technologies. This role involves focusing on RTL design and validation of high-speed interfaces and configurable multi-protocol PHYs, ensuring continuous innovation and development.

Experience Level

Mid-Career

Responsibilities

The responsibilities for this position include:

• Performing RTL design of digital components.
• Designing IPs specifically for FPGAs (AMD/Altera).
• Utilizing FPGA tool chains, such as Vivado or Quartus.
• Developing and validating timing constraints across multiple clock domains.
• Leading and mentoring fellow engineers.
• Collaborating with design verification teams to meet standards.
• Analyzing and resolving Lint and CDC/RDC errors.
• Ensuring quality and timely deliverables.
• Improving and automating design processes.
• Supporting post-silicon product bring-up and debugging.

Requirements

Applicants should demonstrate a strong affinity for digital design and possess excellent analytical skills. They should also be proactive, reliable, and able to take ownership of tasks. Additionally, a solid understanding of the following is required:

• Digital design using Verilog/System Verilog.
• Working with timing constraints for multi-clock designs.
• Debugging in digital and mixed-signal simulations.
• Basic knowledge of DDR Memory Controllers is preferred.
• Experience with scripting languages like Perl, Tcl, or Python.
• Strong verbal and technical communication skills for documentation.

Education Requirements

A Bachelor's or Master's degree in Electrical Engineering, accompanied by relevant industry experience, is required.