Intern Verification Engineer

Role Summary

The Intern Verification Engineer position is geared towards university students eager to learn and contribute to the development of verification strategies for digital and mixed-signal IC designs within a professional team.

Experience Level

This position is intended for university students in Electrical Engineering, Computer Engineering, Computer Science, or related fields. Previous experience in analog/digital design or test engineering is preferred.

Responsibilities

The intern will be involved in various tasks including:

• Developing verification strategies and planning for digital and mixed-signal IC designs.
• Maintaining verification tests, coverage, and checker development.
• Creating reusable verification testbench structures with object-oriented principles and UVM.
• Participating in training courses to enhance skills.
• Conducting self-research to improve knowledge and effectiveness.

Requirements

The ideal candidate should possess:

• Knowledge of electrical properties and digital circuits.
• Familiarity with debugging HW issues and Unix.
• Strong written and verbal communication skills with good teamwork capability.
• Pre-Intermediate English proficiency.

Education Requirements

A current university student pursuing a degree in Electrical Engineering, Computer Engineering, Computer Science, or related disciplines.