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Hardware Development Engineer

Advanced Micro Devices
Full-time
On-site
Markham, ON
Level - Mid-Career

Role Summary

The Memory IO team at AMD is seeking an experienced Hardware Development Engineer to lead RTL and Firmware development for high-speed LPDDR, DDR, and inter-chip I/O IPs. This role involves defining, designing, and developing industry-leading Memory PHYs and interface IPs.

Experience Level

Candidates should possess strong analytical skills, detail orientation, and a self-starter attitude with a demonstrated ability to drive tasks to completion. Experience in a team-oriented environment with effective communication skills is essential.

Responsibilities

  • Conduct RTL design for memory I/O.
  • Develop PHY Digital Architecture from pathfinding, coding, verification to physical implementation.
  • Create PHY link layer design, implementation & verification in collaboration with Analog and System architects.
  • Design micro-architectures of digital blocks for memory I/O, including hardware/firmware partitioning.
  • Execute PHY Analog/Digital co-design and DSP algorithm development for Analog Front End.
  • Engage in digital design and RTL coding.
  • Oversee timing synthesis and drive the physical implementation processes.
  • Enhance RTL design quality and reliability through methodology development.
  • Provide direction and supervision to other RTL and firmware designers.
  • Define and optimize training hardware and algorithms, adapting as necessary for silicon optimization.
  • Collaborate with internal customers to establish functional boundaries and specifications.

Requirements

Applicants should have experience in digital design engineering with a focus on successful tape-outs and technical leadership. Proficient knowledge of Verilog, C, C++, and scripting languages such as Python, Perl, and TCL is required. Familiarity with clocking architectures, synchronization, and CDC methodology is essential. Prior experience with DSP, control theory, and algorithms is preferred, along with knowledge of SERDES, DDR, Memory Controller, or MAC design.

Education Requirements

A Bachelor's degree in Electrical or Computer Engineering is required; a Master's or PhD degree will be considered an advantage.