Graphics Cache Hierarchy Design Verification Engineer

Role Summary

The Graphics Cache Hierarchy Verification Engineer is responsible for verifying the functionality of various components within the graphics memory subsystem, including caches, memory management units, interconnects, and links. This role demands a deep understanding of microarchitecture and the ability to collaborate effectively with design teams.

Experience Level

This position is suitable for candidates with a relevant educational background and practical experience in computer architecture, embedded systems, and verification methodologies. A Bachelor’s degree in Computer Engineering, Computer Science, or Electrical Engineering is required.

Responsibilities

• Author test plans for subsystem functionality and conduct comprehensive verification.
• Develop verification software components to simulate and validate GPU memory hierarchy components.
• Collaborate with design engineers to debug and finalize design blocks.
• Manage test benches for both sub-block and subsystem level verification.

Requirements

• Experience with hardware description languages (HDLs), specifically Verilog or System Verilog.
• Knowledge of object-oriented programming and data structures.
• Familiarity with HDL simulators and waveform viewers.
• Strong problem-solving skills and ability to work independently or in team settings.

Education Requirements

A Bachelor of Science degree in Computer Engineering, Computer Science, or Electrical Engineering is mandatory. Coursework in computer architecture and verification methodologies is highly preferred.