Graduate Talent - Pre-si System Validation

Role Summary

This position is part of the Malaysia Design Center's Data Center Functional Validation team. The role primarily involves developing test plans, test content, and executing validation in Virtual Platforms, Emulations, and FPGA setups. Responsibilities include debugging failures related to RTL and SW/FW interactions.

Experience Level

Entry-level position suitable for fresh graduates holding a Bachelor's or Master's degree in Electrical, Electronic, Mechatronic, Computer Engineering, or Computer Science.

Responsibilities

The responsibilities for this role include:

• Creating detailed test plans and content for system validation.
• Conducting validation execution using Virtual Platforms, Emulation, or FPGA technologies.
• Debugging issues on RTL and understanding SW/FW interactions.
• Utilizing knowledge of silicon design and various emulation tools.
• Collaborating effectively with team members and communicating findings.

Requirements

The ideal candidate should possess:

• Strong foundational knowledge in C/C++, Verilog, Python, Intel Architecture, and SoC architecture.
• Exposure to protocols like DDR, PCIe, I2C SPI.
• Hands-on experience with emulation, virtual platforms, and design tools (e.g., Synopsys, Mentor, Cadence).
• Excellent analytical, communication, and debugging skills.
• A proactive attitude and a genuine interest in teamwork and collaboration.

Education Requirements

Bachelor's or Master's degree in Electrical, Electronic, Mechatronic, Computer Engineering, or Computer Science.