Graduate Engineer – Digital Backend (RTL to GDS), Cadence Flow (f/m/d)

Role Summary

The Graduate Digital Backend Engineer will engage in the physical implementation of complex SoC and mixed-signal designs. The position involves working with a seasoned backend team to convert RTL code into a GDSII database using the Cadence tool suite, covering the entire backend workflow.

Experience Level

This position is intended for recent graduates with a foundational understanding of digital backend design concepts and tools, particularly in RTL to GDS conversion.

Responsibilities

The key responsibilities include:

• Running RTL synthesis using Cadence Genus and optimizing netlists for timing, power, and area.
• Assisting in floorplanning and power grid design using Cadence Innovus.
• Executing placement, clock tree synthesis, and routing to adhere to design specifications.
• Conducting static timing analysis with Cadence Tempus and resolving timing violations.
• Performing power and IR-drop analysis to support power network optimization.
• Executing physical verification with Mentor Calibre and debugging issues.
• Coordinating sign-off processes and preparing tape-out-ready GDSII outputs.

Requirements

A Master's or Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field is required. Candidates should possess a solid understanding of CMOS and VLSI designs, familiarity with Verilog/VHDL, and basic scripting skills in languages like TCL or Python. Strong analytical, collaborative skills and eagerness to learn are key to success in this role.

Education Requirements

Master's or Bachelor's degree in Electrical Engineering, Computer Engineering, Microelectronics, or a related discipline.