Role Summary
The Graduate Digital Engineer position involves executing the physical-level implementation of digital logic designs in semiconductor chips. The role encompasses various tasks ranging from logic synthesis to timing closure and collaboration with different teams to optimize chip design processes.
Experience Level
This position is aimed at new graduates with a background in electronics or related fields. Candidates should possess a foundational understanding of electrical engineering principles and demonstrate a strong interest in digital circuit design.
Responsibilities
The core responsibilities for the Graduate Digital Engineer include:
- Performing logic synthesis verification using tools like DC/Genus.
- Designing for testability architectures including SCAN, MBIST, and ATPG.
- Writing constraints (SDC), achieving timing closure, and ensuring low-power design with STA signoff validation.
- Coordinating with frontend, PR, validation, and testing teams for iterative PPA optimization, ultimately leading to tape-out.
- Documenting all design processes and outcomes.
Requirements
Candidates should meet the following requirements:
- Bachelor’s degree or higher in Electronics, Integrated Circuit Design, Communication Engineering, Automation, Computer Science, Electrical Automation, Mechatronics, or related fields.
- Strong academic performance in essential electronics courses (Circuit Theory, Digital Circuits, Analog Circuits, Microcontroller Principles).
- Participation in electronics design competitions and a genuine interest in electronics technology is preferred.
- Familiarity with DC, PT, Tempus, Formality, TetraMAX, and similar tools is advantageous.
- Knowledge of programming languages such as TCL, Python, Linux, and Verilog is beneficial.
- Fluent reading and writing in English; proficiency in Japanese is a plus.
Education Requirements
A minimum of a Bachelor’s degree in Electronics, Electrical Engineering, or a related field is required.