Front-End Design STA Engineer

Company Overview

Advanced Micro Devices Inc is a technology company focused on producing high-performance computing and graphics solutions.

Role Summary

The Front-End Design STA Engineer will be responsible for leading low-power design strategies, synthesis, and timing closure for complex system-on-chip (SoC) and intellectual property (IP) designs. This role emphasizes optimizing power, performance, and area (PPA) dynamics using standard electronic design automation (EDA) tools.

Experience Level

This position requires a strong background in digital design and power optimization, particularly in advanced semiconductor technologies.

Responsibilities

• Develop and implement power reduction strategies across SoC/IP design.
• Perform synthesis and static timing analysis (STA) to achieve targeted PPA metrics.
• Analyze and optimize dynamic and leakage power using industry-standard tools.
• Collaborate with RTL designers, physical design, and verification teams to ensure compliance with timing and power specifications.
• Conduct low-power verification checks (UPF/CPF) and validate power intent implementation.
• Support sign-off activities for Lint, CDC, synthesis, and timing/power closure.
• Automate and enhance power and timing workflows for improved efficiency.
• Develop test plans that account for interactions between various hardware features.

Requirements

• In-depth knowledge of ASIC synthesis and STA techniques.
• Proficiency using EDA tools such as Synopsys Design Compiler, PrimeTime, and others.
• Experience with power analysis techniques including clock gating and multi-voltage design.
• Familiarity with UPF/CPF power intent specifications.
• Solid understanding of digital design principles and RTL coding in Verilog/SystemVerilog.
• Hands-on experience with advanced process nodes (e.g., 7nm, 5nm, 3nm) is advantageous.
• Knowledge of scripting languages for workflow automation (TCL, Perl, Python or Shell).
• Exposure to floorplanning and ECO flows.
• Experience managing the entire design lifecycle of a block or SoC.

Education Requirements

A Master's degree is preferred; however, applicants with a Bachelor's degree will also be considered.