Role Summary
The FPGA Engineer will be responsible for understanding Arm IP RTL & SoC designs and implementing a prototype of the ASIC RTL on FPGA. This role includes RTL integration, design modifications, simulation/verification, and hardware validation of FPGA specific IPs and peripherals within a larger SoC prototype.
Experience Level
3-5 years of experience in FPGA engineering.
Responsibilities
- Development and verification of subsystems, peripherals, and IPs for FPGA prototyping.
- Modifying ASIC RTL to target dedicated FPGA prototyping platforms.
- Debugging test failures and collaborating with design teams and FPGA users.
Requirements
- Strong RTL skills in Verilog / System Verilog with version control experience.
- Understanding of Arm-based systems, SoC architecture, and AMBA protocols.
- Experience with high-speed I/O peripherals (e.g., LPDDR, PCIe, Ethernet, USB) and debugging in both simulation and hardware.
- Proficient in scripting languages such as Tcl or Python.
Education Requirements
Degree in Electrical Engineering, Computer Engineering, or a related field is desired.