Formal Verification Staff Engineer

Role Summary

The Formal Verification Staff Engineer will play a crucial role in driving AMD's processor core development through advanced verification techniques. This position demands a self-motivated individual keen on enhancing the quality and efficiency of AMD's cutting-edge designs, working collaboratively within an innovative team.

Experience Level

We are seeking candidates with a robust background in ASIC design and formal verification. Ideal candidates would have previous experience in a similar role, demonstrating both technical expertise and team-oriented communication skills.

Responsibilities

• Utilize advanced formal verification techniques to ensure the integrity of next-generation designs.
• Maintain and optimize the formal verification infrastructure to maximize productivity.
• Foster technological relationships across the AMD design community.
• Facilitate inter-departmental innovation and collaboration.
• Contribute to R&D efforts in emerging verification domains such as security and low-power verification.

Requirements

• Experience in ASIC design, verification, or similar areas.
• Proficient in formal verification methodologies including assertion-based and deep bug hunting techniques.
• Skills in formal tools such as Jasper and VC-formal, along with system Verilog, Verilog, or VHDL, and scripting languages (TCL/Python).
• Familiarity with CPU, GPU, and memory controller architecture is preferred.

Education Requirements

A Bachelor’s degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field is required. Candidates with a Master's or PhD will also be considered, especially with relevant work experience.