Digital Design Verification Apprentice

Role Summary

This apprenticeship at Synopsys offers a hands-on experience in digital design verification, focusing on high-speed PHYs and Serdes. You will work in a collaborative environment, gaining practical insights into the verification process while contributing to real projects in the field of electronics and engineering.

Experience Level

This position is ideal for fresh graduates from the classes of 2024 and 2025 who are eager to apply their academic knowledge in a practical setting. Candidates should not be currently enrolled in M-Tech programs and should have limited internship experience.

Responsibilities

• Develop and execute verification plans for high-speed PHYs and Serdes based on complex networking protocols.
• Create and enhance verification environments using System Verilog and methodologies like VMM/UVM.
• Engage in technical reviews and contribute to improving development processes for high-quality outputs.

Requirements

Candidates must possess a B.E./B.Tech in Electronics, Electrical, Instrumentation, or related fields. Familiarity with System Verilog, VMM/UVM methodologies, and simulation tools is essential. Strong communication skills, a willingness to learn, and an ability to work collaboratively are also important.

Education Requirements

A Bachelor’s degree (B.E./B.Tech) in Electronics, Electrical, Instrumentation, or a related field is required.