Role Summary
The DFT Staff Engineer at Synopsys will play a critical role in defining and implementing DFT architectures for IP designs. You will handle SCAN insertion, ATPG simulations, analyze test coverage, develop timing constraints, and ensure integration guidelines are followed to enhance product reliability.
Experience Level
This position requires a seasoned engineer with over 5 years of DFT design experience. A strong background in digital design and effective communication skills are essential.
Responsibilities
- Define and implement DFT architecture for IP designs.
- Perform SCAN insertion and ATPG simulation.
- Analyze and improve test coverage.
- Develop STA DFT timing constraints.
- Prepare DFT integration guidelines for SoC.
- Conduct quality checks and FMEDA/DFMEA analysis.
Requirements
- BS/MS/PhD in Electronics or a related field.
- 5+ years DFT design experience.
- Expertise in Scan insertion, ATPG, JTAG.
- Familiarity with Synopsys tools such as Design Compiler, VCS, TetraMAX.
- Scripting skills in Perl, TCL, or Python are beneficial.
Education Requirements
A bachelor’s, master’s, or PhD in Electronics or a closely related field is required for this role.