DFT ATPG Engineer
NVIDIAJob Title
DFT ATPG Engineer
Role Summary
The DFT ATPG Engineer will be part of NVIDIA's Design-for-Test Engineering team, focusing on the development of cutting-edge DFT technologies. This position involves close collaboration with multiple teams to innovate solutions for semiconductor chips, particularly in terms of DFT architecture, verification, and post-silicon validation.
Experience Level
Mid-level, requiring 3+ years of hands-on DFT/ATPG experience.
Responsibilities
Key responsibilities include:
- Managing state-of-the-art Design for Test/ATPG flows and implementations.
- Overseeing full ATPG project ownership from architecture and planning to pattern generation and post-silicon diagnosis.
- Inventing and maintaining automation flows to minimize production test time.
Requirements
Must-have qualifications:
- 3+ years of hands-on DFT/ATPG experience and technical knowledge in DFT ASIC Design.
- Strong programming skills in scripting languages.
- BSc in Electrical Engineering or Computer Engineering.
- Quick learner with a proactive and self-motivated approach.
Nice-to-have qualifications:
- Knowledge of DFT methods including scan, BIST, and fault models.
- Experience with Mentor TestKompress ATPG tool.
- Familiarity with programming in TCL, PRL, Python, and Unix shell scripts.
- Experience with ATE and silicon bring-up.
Education Requirements
BSc in Electrical Engineering or Computer Engineering is required.
About the Company
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
