CPU RTL Engineer
AkeanaRole Summary
The CPU RTL Engineer will work within a small team focused on processor design at Akeana. The team has extensive experience in processor architecture and development, presenting an opportunity to contribute significantly to design work.
Experience Level
Mid-level
Responsibilities
The responsibilities for this role include:
- Working on RTL design with a focus on micro-architecture development, pipelining, timing closure, power and area.
- Interacting with Architecture, Verification, and Physical Design teams.
- Owning key components of the design process.
Requirements
Candidates should have the following qualifications:
- Strong background in RTL design.
- Experience in processor architecture (RISC-V, ARM, MIPS, x86).
- Previous experience in processor design is a plus.
- Experience with execution units and caches is desirable.
Education Requirements
Not specified.
About the Company
Company: Akeana
Headquarters: Santa Clara, CA, USA
Akeana is a start-up specializing in processor design, with a team experienced in developing state-of-the-art products. Their expertise spans multiple architectures, including Risc-V, ARM, and x86, with backgrounds from prominent companies in the semiconductor industry. Funded by top-tier venture capitalists and industry leaders, Akeana focuses on innovative RTL design and micro-architecture development.
