Chip Power Estimation Engineer
NVIDIAJob Title
Chip Power Estimation Engineer
Role Summary
NVIDIA is seeking a highly motivated engineer to develop architectural power estimation for GPUs and SOCs. This role involves creating advanced power models, understanding chip architecture, and collaborating with various teams to optimize power consumption.
Experience Level
Mid-level, with a minimum of 4 years experience in power/performance estimation and optimization techniques.
Responsibilities
The responsibilities include:
- Developing and correlating power estimation models/tools for NVIDIA's chips.
- Architecting power models for various use-cases, including Idle power and IO power.
- Designing tools based on power models and developing their testing methodologies.
- Calibrating power models using measured silicon data.
- Analyzing chip configurations and process technology options to optimize power/performance.
- Contributing to ideas for Performance/Watt improvements in NVIDIA's GPUs and SOCs.
Requirements
The following qualifications are necessary:
- B.Tech./M.Tech with 4+ years of experience in power/performance estimation.
- Strong knowledge of power characteristics of VLSI circuits.
- Experience with low power design techniques.
- Background in power estimation techniques and algorithms.
- Proficient programming skills, preferably in Python.
Education Requirements
B.Tech./M.Tech is required.
About the Company
Company: NVIDIA
Headquarters: Santa Clara, California, USA
NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.
