ASIC SoC Verification Lead

Role Summary

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s custom silicon/ASIC designs, ensuring a bug-free final design.

Experience Level

8+ years of Design Verification experience with strong knowledge in Verilog, System Verilog, C, and UVM/OVM.

Responsibilities

• Collaborate with various teams to understand architecture and verification requirements.
• Develop detailed test plans based on architectural specifications.
• Have a good understanding and exposure to SoC design and architecture.
• Own the Design Verification sign-off.
• Work with post-silicon teams for debug support.
• Bring up Testbench/SoC verification environment.
• Continuously improve methodology for efficiency.
• Mentor junior engineers to enhance team performance.

Requirements

Proficient in SoC/sub-system/IP level ASIC verification, debugging firmware and RTL code, and using UVM testbenches. Should have experience with high-speed interfaces and ARM/RISC Processor based designs verification.

Education Requirements

Applicable degree in engineering or related field. Scripting language experience in Perl, Python, Makefile, and shell preferred.