Role Summary
This position focuses on the design and implementation of microarchitecture for Adaptive SoC and FPGA configuration systems, contributing to projects that require innovative solutions in a fast-paced environment.
Experience Level
This role requires a strong background in ASIC design and familiarity with various design processes related to complex system architecture.
Responsibilities
- Develop detailed micro-architecture specifications and manage RTL implementation of advanced FPGA configuration controllers.
- Collaborate with cross-functional teams including hardware, firmware, and software to ensure integration and efficiency in configuration solutions.
- Oversee the design process from concept through production, inclusive of RTL coding, verification, synthesis, and silicon validation.
- Integrate complex blocks into a full-chip design while managing connectivity and power domains.
- Work with verification teams to secure comprehensive functional coverage and reliability.
- Coordinate with test engineers for design-for-test and FPGA test functionalities to enhance testing efficiency.
- Focus on optimizing performance, power, and area (PPA) for configuration paths.
- Partner with Physical Design teams to validate correct design implementation.
Requirements
Candidates must show proven experience in ASIC design, including knowledge of various on-chip interconnect protocols and proficiency in relevant design tools and programming languages.
Education Requirements
A Bachelor's or Master's degree in Electrical Engineering or Computer Engineering is required.